Planar, vertical, high-voltage, power MOSFETs are typically constructed using N− epitaxial layer on a N+ substrates. Such a device 10 is shown in FIG. 1. Device 10 includes an N+ substrate 12 on which an N− epitaxial layer is grown. The source and gate components 16 of the device 10 are then constructed on the expitaxial layer 14. In such devices, it is desirable to reduce the on-resistance of the device while maintaining the breakdown voltage at a reasonable level. The on-resistance of the device is a function of the voltage rating of the material that forms the epitaxial layer, such that a higher voltage rating results in a higher on-resistance for the device, as shown in FIG. 2. Since the voltage rating is a function of the doping density and the thickness of the epitaxial layer, for a given doping density, the thickness of the epitaxial layer can be manipulated to vary the on-resistance of the device.
In lower voltage power transistors, such as shown at 20 in FIG. 3 and 21 in FIG. 4, the epitaxial layers 22 and 23, respectively, are relatively thin. In device 20, FIG. 3, the gate 24 is recessed into the epitaxial layer 22 as shown. A trench 26 is formed in the substrate 28, which serves to lower the device on-resistance by reducing the JFET pinch effects. However, because the epitaxially layer 22 under the gate 24 is similar in thickness to the epitaxial layer 14 in device 10, FIG. 1, the improvement in on resistance is marginal. In device 21, FIG. 4, the epitaxial layer 23 is trenched and the gate 25 is recessed to reduce the JFET pinch resistance and improve the channel packing density. In devices 20 and 21, the breakdown voltage of the device may be lowered by the increased exposure of the gate to the epitaxial region defined by each of the thicknesses TB2 and TB3.
In some high-voltage devices, such as is shown at 40 in FIG. 5, in order to increase the breakdown voltage of the device, the epitaxial layer 42 is formed to be relatively thick and is of a relatively lower doping density. A trench 44 may be included in the substrate 46. However, the epitaxial region is planarized during the epitaxy growth period, and this configuration causes the on-resistance of the device to be higher than the planar device 10 of FIG. 1 for an equivalent doping density and thickness TB1 and TB4, since TA4 is now larger than TA1.
These and other attempts at improving the on resistance of the power transistor do so by improving the efficiency of the current flow from the top of the epitaxy layer to the substrate. However, they do not change the relationship between the thickness and doping of the epitaxial layer and the maximum breakdown of the device structure.